1. Field of the Invention
This invention relates to a method of fabricating a new semiconductor device using an etching stopper layer formed by oxidation, and to a new semiconductor device fabricated by this method.
2. Description of the Prior Art
As the micro-miniaturization of interconnection patterns of semiconductor integrated circuits progresses, increased difficulty of processing due to problems of positional misalignment in photolithography steps has been becoming marked. For example when an interlayer connection hole or an interconnector channel connecting to a contact electrode formed in an insulating film is formed by photo-etching, it sometimes happens that a necessary underlying film is unintentionally etched as a result of misalignment of a photomask and a semiconductor substrate. Also, when the shape of an interlayer connection hole or an interconnector channel is different from the shape of an underlying interlayer connection hole or interconnector channel it sometimes happens that a necessary underlying film is unintentionally etched by over-etching. Consequently, to carry out minute working it is essential to form on the underlying film an etching stopper film having an opening above the contact electrode, to protect the underlying film. Conventionally the etching stopper film has been formed on the underlying film by photo-etching each time a fine interlayer connection hole or interconnector channel is formed. In consideration of etching selectivity with respect to silicon oxide of interlayer insulating films, silicon nitride has been used for etching stopper films.
This kind of semiconductor device and its manufacturing method will now be described with reference to the sectional views of FIG. 1 through FIG. 6, taking as an example the case of a MOS type semiconductor device.
First, as shown in FIG. 1, a field oxide film 303 is formed on the surface of a semiconductor substrate 301, and on the semiconductor substrate 301 in a device formation region bounded by the field oxide film 303 are successively formed a gate insulating film 305, a polycrystalline silicon film 307 of a lower gate electrode, and an aluminum film 309 of an upper electrode. Then, a gate side wall insulating film 311 is formed on the side walls of the gate electrode by photo-etching. Also, high-concentration source and drain regions 313 and low-concentration source and drain regions 315 are formed in the semiconductor substrate 301 by ion implantation. Next, an interlayer insulating film 317 of for example boron phosphorus silicate glass (BPSG) or phosphorus silicate glass (PSG) is formed on the semiconductor substrate 301, the gate electrode 309 and the device separation region 303 by chemical vapor deposition (CVD) and the interlayer insulating film 317 is flattened by chemical mechanical polishing (CMP). Contact holes 319 are then formed above the source and drain regions 313 by photo-etching.
Next, as shown in FIG. 2, a barrier metal 321 consisting of titanium is formed on only the inner surfaces of the contact holes 319 by sputtering. An aluminum film to constitute interconnection metal is then deposited on the barrier metal 321 by sputtering, and contact electrodes 323 are formed completely filling the contact holes 319 with aluminum film using CVD or the like. Next, a silicon nitride film 351 having openings above the contact electrodes 323 is formed on the interlayer insulating film 317. The silicon nitride film 351 is formed by chemical dry etching. This state is shown in three-dimensional cross-section in FIG. 3. The silicon nitride film 351 has openings only over the contact electrodes 323.
Next, as shown in FIG. 4, a silicon oxide film 327 is formed as an interlayer insulating film on the silicon nitride film 351 and the contact electrodes 323 by for example CVD. Then, a photoresist film 329 having openings above the contact electrodes 323 is formed on the silicon oxide film 327.
Then, as shown in FIG. 5, with the photoresist film 329 as a mask, the interlayer insulating film 327 is etched using the silicon nitride film 351 and the contact electrodes 323 as etching stoppers to form interconnection channels 331. The photoresist film 329 is then removed. At this time, it sometimes happens that due to positional misalignment in the formation of the photoresist film 329 the positions of the openings in the photoresist film 329 and the contact electrodes 323 are misaligned. However, because the silicon nitride film 351 was formed on the interlayer insulating film 317, the silicon nitride film 351 serves as an etching stopper film at the time of formation of the interconnection channels 331 and prevents over-etching of the underlying interlayer insulating film 317. This state is shown in three-dimensional cross-section in FIG. 6.
An interconnection layer and a passivation film and so on are then formed to complete the semiconductor device.
Conventionally, when forming contact holes and via holes, an etching stopper film formed by photo-etching has been necessary to protect underlying films. In the method described above, at the time of formation of a connection hole such as a contact hole or a via hole, a nitride film is formed as an etching stopper film by photo-etching. However, as semiconductor devices become more highly integrated the number of steps of forming connection holes or interconnection channels or the like increases and it is necessary to form an etching stopper film by photo-etching for each of these steps, and the problem arises that the number of photo-etching steps increases as a result.